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The Verilog® Hardware Description Language
Donald ThomasPhilip Moorby
出版Springer Science & Business Media, 2008-09-11
主題Technology & Engineering / Electronics / Circuits / GeneralComputers / Design, Graphics & Media / CAD-CAMTechnology & Engineering / Electronics / GeneralTechnology & Engineering / Electrical
ISBN03878534489780387853444
URLhttp://books.google.com.hk/books?id=DxQGrz7q-SwC&hl=&source=gbs_api
EBookSAMPLE
註釋XV From the Old to the New xvii Acknowledgments xx| Verilog A Tutorial Introduction Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 Behavioral Modeling of Combinational Circuits 11 Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 Procedural Modeling of Clocked Sequential Circuits 14 Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("