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Edge Interoperability for High-performance Optical Core Network Routers
註釋This dissertation presents enabling technology required for low-latency, low packet loss, interoperability between today's electronic networks and future optical networks. Adaptation between legacy 100 megabit Ethernet (MbE) and 40Gb/s OPS formats is successfully achieved by utilizing custom, FPGA-based Edge Adaptation Layers that demonstrate latencies below 300ns and packet loss rates less than 1E-5. Latency penalties are minimized by forgoing the fragmentation process at the edge and enforcing variable-length packet compatibility within optical core routers. A re-sizable optical buffer is designed and implemented to enable all-optical routers to accommodate packet lengths ranging from 40 to 800 bytes with less than 5% packet loss. This dissertation culminates in an end-to-end ODR link demonstration utilizing an energy efficient FPGA-based electronic control and UCSB-fabricated photonic integrated circuits (PICs) housed in custom package sub-mounts and FPGA-based driving circuitry.