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出版Laboratory for Computer Science, Massachusetts Institute of Technology, 1991
URLhttp://books.google.com.hk/books?id=MEIQuAAACAAJ&hl=&source=gbs_api
註釋Abstract: "High network latencies in large-scale multiprocessors can cause a significant drop in processor utilization. By maintaining multiple process contexts in hardware and switching among them in a few cycles, multithreaded processors can overlap computation with memory accesses and reduce processor idle time. This paper presents an analytical performance model for multithreaded processors that includes cache interference, network contention, context-switching overhead, and data- sharing effects. The model is validated through our own simulations and by comparison with previously published simulation results. Our results indicate that processors can substantially benefit from multithreading, even in systems with small caches.