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Synthesis of Three-level Logic Circuits with Application to a Radix Three Computer Arithmetic Unit

Thomas Alois Rozmarich

出版	University of Illinois, Department of Computer Science, 1965
URL	http://books.google.com.hk/books?id=Q_eMNwAACAAJ&hl=&source=gbs_api

註釋

It is known that the use of a larger radix in a digital computer will result in the speeding up of arithmetic operations where the number of recursive steps is reduced with a larger radix. One problem encountered when going to higher radices involves the voltage representation of the digital values, which may lead to the need of additional circuitry just to be able to distinguish between the various voltage levels. Ternary logic has been suggested as a means of controlling timing in sequential circuitry. Adder circuits are presented for use in a radix three computer, and, also three level logic operations which have a more general application.