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Use of Dual-level Logic Aids in Block Diagram Development

R. H. Braasch

出版	Sandia Corporation, 1960
URL	http://books.google.com.hk/books?id=Yap355bt8VAC&hl=&source=gbs_api
EBook	FULL_PUBLIC_DOMAIN

註釋

A logic system is developed for use in design procedures involving the application of common emitter transistor circuits operating in the switching mode. The presence of common emitter transistor switches normally requires the use of Sheffer Stroke (Not-And) and/or Nor (Not-Or) logic functions to describe the resultant logic behavior in circuit applications, because of the inherent phase reversal in transfer characteristics. A dual-level logic convention is proposed whereby the procedure for noninverting circuitry is applied to inverting circuitry. The characteristics phase reversal need not be taken into account if reverse level is satisfactory as an output.