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Test Generation of Crosstalk Delay Faults in VLSI Circuits

S. JayanthyM.C. Bhuvaneswari

出版	Springer, 2018-09-20
主題	Technology & Engineering / Electronics / Circuits / GeneralComputers / Hardware / GeneralComputers / Logic DesignTechnology & Engineering / ElectricalComputers / Programming / AlgorithmsComputers / Software Development & Engineering / Systems Analysis & DesignComputers / Computer Architecture
ISBN	981132493X9789811324932
URL	http://books.google.com.hk/books?id=b3hvDwAAQBAJ&hl=&source=gbs_api
EBook	SAMPLE

註釋

This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.