返回Google圖書搜尋

Library-free Technology Mapping for VLSI Circuits with Regular Layouts

出版	Universitat Politècnica de Catalunya. Facultat de Matemàtiques i Estadística. Departament de Llenguatges i Sistemes Informàtics, 2014 (Master of Science in Advanced Mathematics and Mathematical Engineering (MAMME)), 2014
URL	http://books.google.com.hk/books?id=f50fywEACAAJ&hl=&source=gbs_api

註釋Technology mapping is the task to transform a technology independent logic network into a mapped network using gates from a library, optimizing some objective function such total area, delay or power consumption. As stated, the problem is completely intractable. Therefore, different techniques are applied to solve the problem, such as using different simplified representations. The usual approach consists of using a fixed library, typically partially handmade. Designing such libraries is a costly process, specially because of the lack of good automatic techniques to perform it. This is the main motivation for this work and the goal is to move from fixed-library technology mapping to library-free technology mapping. This thesis presents different algorithms and techniques to move to library-free technology mapping for area and for delay optimization.