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The Student's Guide to VHDL
Peter J. Ashenden
出版
Elsevier
, 2008-05-19
主題
Computers / Computer Architecture
Computers / Software Development & Engineering / Systems Analysis & Design
Computers / Computer Engineering
Computers / Hardware / General
ISBN
1558608656
9781558608658
URL
http://books.google.com.hk/books?id=iskV16bpYdgC&hl=&source=gbs_api
EBook
SAMPLE
註釋
The Student's Guide to VHDL
is a condensed edition of
The Designer's Guide to VHDL,
the most widely used textbook on VHDL for digital system modeling.
The Student's Guide
is targeted as a supplemental reference book for computer organization and digital design courses.
Since publication of the first edition of
The Student's Guide,
the IEEE VHDL and related standards have been revised. The
Designer's Guide
has been revised to reflect the changes, so it is appropriate that
The Student's Guide
also be revised.
In The Student's Guide to VHDL, 2nd Edition,
we have included a design case study illustrating an FPGA-based design flow. The aim is to show how VHDL modeling fits into a design flow, starting from high-level design and proceeding through detailed design and verification, synthesis, FPGA place and route, and final timing verification. Inclusion of the case study helps to better serve the educational market. Currently, most college courses do not formally address the details of design flow. Students may be given informal guidance on how to proceed with lab projects. In many cases, it is left to students to work it out for themselves. The case study in
The Student's Guide
provides a reference design flow that can be adapted to a variety of lab projects.