註釋 Not only conventional computer architectures, such as the von-Neumann architecture with its inevitable von-Neumann bottleneck, but likewise the emerging field of edge computing require to substantially decrease the spatial separation of logic and memory units to overcome power and latency shortages. The integration of logic operations into memory units (Logic-in-Memory), as well as memory elements into logic circuits (Nonvolatile Logic), promises to fulfill this request by combining high-speed with low-power operation. Ferroelectric field-effect transistors (FeFETs) based on hafnium oxide prove to be auspicious candidates for the memory elements in applications of that kind, as those nonvolatile memory elements are CMOS-compatible and likewise scalable. This work presents implementations that merge logic and memory by exploiting the natural capability of the FeFET to combine logic functionality (transistor) and memory ability (nonvolatility). 