登入
選單
返回
Google圖書搜尋
Nanoscale Mos Transistors
David Esseni
Pierpaolo Palestri
Luca Selmi
其他書名
Semi-Classical Transport and Applications
出版
Cambridge University Press
, 2014-05-14
ISBN
0511933223
9780511933226
URL
http://books.google.com.hk/books?id=nZfNrQEACAAJ&hl=&source=gbs_api
註釋
"The traditional geometrical scaling of the CMOS technologies has recently evolved in a generalized scaling scenario where material innovations for different intrinsic regions of MOS transistors as well as new device architectures are considered as the main routes toward further performance improvements. In this regard, high-? dielectrics are used to reduce the gate leakage with respect to the SiO2 for a given drive capacitance, while the on-current of the MOS transistors is improved by using strained silicon and possibly with the introduction of alternative channel materials. Moreover, the ultra-thin body Silicon-On-Insulator (SOI) device architecture shows an excellent scalability even with a very lightly doped silicon film, while non-planar FinFETs are also of particular interest, because they are a viable way to obtain double-gate SOI MOSFETs and to realize in the same fabrication process n-MOS and p-MOS devices with different crystal orientations"--