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High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip
Zheng Wang
Anupam Chattopadhyay
出版
Springer
, 2017-06-23
主題
Technology & Engineering / Electronics / Circuits / General
Computers / Hardware / General
Technology & Engineering / Electrical
Computers / Software Development & Engineering / Systems Analysis & Design
ISBN
9811010730
9789811010736
URL
http://books.google.com.hk/books?id=o3YpDwAAQBAJ&hl=&source=gbs_api
EBook
SAMPLE
註釋
This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures.