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Investigation of a High-speed FPGA-based Architecture to Solve Linear Systems of Equations Using the Jacobi Method
註釋Finding the rapid and accurate solution to the linear algebraic systems of equations expressed as Ax=b is one of the core processes in many engineering and science applications such as the dynamic simulation of the electrical circuits. However, most of these applications operate on matrices that are sparse in nature. The contemporary software-based methods operate slower on these sparse matrices due the overhead involved in fetching and decoding instructions and cache misses. Prasanna et. al. [4, 5] used an FPGA-based approach to reduce this bottleneck. However the architecture is limited in terms of considering convergence and accuracy and no detailed analysis has been done. Therefore, in this thesis we present a version of a scalable, pipelined and parallel single-precision floating-point FPGA-based approach to find the solutions to sparse linear systems of equations using the Jacobi method considering convergence and accuracy in the monograph and also improved the architecture in terms of the number of IO resources used. We also carried out analysis to find out different parameters that can be changed at the architectural level to trade-off between the performance and the matrix-size that can be solved. To demonstrate the validity of our approach, the system was modeled using VHDL and placed and routed for a Xilinx Virtex-4 xc4vsx25 device.