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出版IBM T.J. Watson Research Center, 1999
URLhttp://books.google.com.hk/books?id=pXWDHAAACAAJ&hl=&source=gbs_api
註釋Abstract: "This paper describes the application of an SPFD-based wire removal technique for circuit implementations utilizing networks of PLAs. It has been shown that a design style based on a multi-level network of approximately equal-sized PLAs results in a dense, fast, and crosstalk-resistant layout. Wire removal is a technique where the total number of wires between individual circuit nodes is reduced, either by removing wires, or replacing them with other existing wires. The benefit of SPFD-based wire removal is shown to be insignificant when the circuit is mapped using standard cells. We demonstrate that this technique is very effective in the context of a network of PLAs. Further, we outline a technique for wire removal using multi-valued SPFDs which we expect will further improve the results."