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註釋Two definitions for the planarity of a hypergraph will be given. These definitions are related to the problem of modelling circuits for circuit layout. It is shown that if a hypergraph is planar according to the first definition, then it is planar according to the second definition, but the reverse does not hold. Testing the planarity can be done in linear time by using the first definition but requires an enumeration using the second definition. The more accurate model for the circuit layout problem uses the second definition. (Author).